The Canon logo in Las Vegas, Nevada. Photo: AFP / Robyn Beck

Japan’s New Energy and Industrial Technology Organization (NEDO) and Ministry of Economy, Trade and Industry (METI) last month announced plans to develop next-generation semiconductor production technology by constructing a pilot line for silicon wafer processing at the 2-nanometer node and beyond.

Simply put, 2nm is the smallest design rule, or integrated circuit feature size, now targeted for commercial production in the semiconductor industry. A nanometer is one-billionth of a meter. For reference or amusement, the width of human hair is generally between 60,000nm and 100,000nm.

The most advanced semiconductor production today, in terms of miniaturization, is done by TSMC of Taiwan and Samsung Electronics of South Korea at the 5nm node.

According to the Nikkei newspaper, METI will support the 2nm project with “roughly 42 billion yen (US$386 million) in funding.”  New and more advanced lithography, etch, cleaning and other key semiconductor production technologies will be evaluated and verified. 

For a step-by-step explanation of how semiconductors are made, click here.

NEDO’s plan includes the creation of an Advanced Semiconductor Production Technology Consortium, consisting of Japanese semiconductor equipment makers Tokyo Electron, Screen Holdings and Canon, and an “overseas foundry” – which is almost certainly TSMC. TSMC reportedly began research on 2nm in 2019.

Tokyo Electron has more than 85% of the world market for photoresist coating and developing equipment that goes with the lithography and is one of the top suppliers of etch equipment. Screen is the world’s leading maker of silicon wafer cleaning equipment and the only other source of coater/developers. Both companies make other types of semiconductor production equipment as well.

The Tokyo Electron Ltd logo.

Canon is one of the leading producers of nanoimprint lithography equipment, which has the potential to compete with ASML’s EUV (extreme ultra-violet) photo-lithography.

EUV, which enables the fabrication of critical semiconductor device layers at and below 10nm, is the focus of American restrictions on the export of semiconductor production equipment to SMIC, China’s leading semiconductor foundry.

As reported in the Federal Register last December 22 by the Bureau of Industry and Security of the US Commerce Department:

Semiconductor Manufacturing International Corporation Incorporated (SMIC) is added to the Entity List as a result of China’s military-civil fusion (MCF) doctrine and evidence of activities between SMIC and entities of concern in the Chinese military-industrial complex. The Entity List designation limits SMIC’s ability to acquire certain US technology by requiring exporters, re-exporters, and in-country transferors of such technology to apply for a license to sell to the company. Items uniquely required to produce semiconductors at advanced technology nodes 10 nanometers or below will be subject to a presumption of denial to prevent such key enabling technology from supporting China’s military modernization efforts. 

Canon entered the nanoimprint business in 2014 with the acquisition of Molecular Imprints of Austin, Texas. Renamed Canon Nanotechnologies, this company has been awarded more than 170 patents covering imprint tools, materials, masks, process technology and imprint-specific device designs.

According to Amandine Pizzagalli, technology and market analyst at French high-tech market research and consulting company Yole Développement, “Canon is the only system vendor who has developed expertise in the storage memory space.”

According to Yole, the other leading producers of Nanotech Lithography equipment are EVG, SUSS MicroTec and Obducat, all of which are European. The Chinese are working on it, but have a long way to go.

Last year, China’s Global Times reported that the Suzhou Institute of Nano-tech and Nano-bionics had made “important progress on ultra-high precision laser lithography” with 5nm resolution, but the researchers themselves noted that China remains “far away” from using it to produce semiconductors.

Xiang Ligang, an industry analyst based in Beijing, told Global Times on July 9, 2020, that “it will take years for China to close the gap with the advanced Western suppliers, in particular ASML.”

If it can be commercialized for high volume applications, nanoimprint will offer lower power consumption, reduced material consumption, space saving and lower equipment cost compared with EUV. Ongoing technical challenges include defects, overlay and throughput.

Canon Nanotechnologies has also shipped nanoimprint systems to Intel and industry R&D consortium Sematech, but the first user in mass production of advanced semiconductors is likely to be NAND flash memory chip maker Kioxia, formerly Toshiba Memory.

Nanoimprint is called lithography because it takes the place of photo-lithography in the semiconductor production process, but it is actually a miniature mold and stamping process. For an explanation of nanoimprint lithography and a schematic showing the difference between it and photo-lithography (including ASML’s EUV lithography), click here.

A security staff member stands next to a logo of the Taiwan Semiconductor Manufacturing Co. Photo: AFP / Sam Yeh

In separate news, the Taiwanese and Japanese press reported in February that TSMC plans to establish an R&D center in Japan’s science city of Tsukuba to develop 3D IC (integrated circuit) materials in cooperation with its Japanese suppliers. METI has reportedly been trying to get TSMC to build a facility in Japan for the past three years.

TSMC and Samsung are now targeting mass production with 3nm process technology in 2022.

And Intel’s “7nm development is progressing well, driven by increased use of extreme ultraviolet lithography (EUV),” according to a March 23 statement by new CEO Pat Gelsinger.

Meanwhile, SMIC is talking about 7nm but, hamstrung by American sanctions, is probably unable to manage 10nm. China can design advanced chips but cannot make them.

In an announcement to the Hong Kong Stock Exchange dated December 18, 2020, SMIC stated that its addition to the Entity List “will have a material adverse effect on the research and development and capacity construction of 10 nanometers and below advanced technology nodes.”

Saying SMIC can’t make the advanced chips is not a criticism of Chinese engineering. No one – not even TSMC, Samsung or Intel – can make leading-edge semiconductors without Japanese, European and American equipment. And there’s no one else – not even the South Koreans or Taiwanese – making that equipment.

The Chinese are trying, but with their propensity for IP theft, they have cut themselves off from the mutually beneficial international cooperation that facilitates the advance of semiconductor technology. After many years of progress, it is likely that they are once again falling behind. 

If so, it counts as one of Xi Jinping’s grossest strategic errors.

Scott Foster is an analyst with Lightstream Research, Tokyo.