Advanced IC packaging is a hot new source of competition among manufacturers of AI processors and other advanced integrated circuits (ICs), and emerging as the next front in the US government’s efforts to reduce America’s dependence on foreign suppliers and retard China’s technological progress.
However, unlike “front-end” IC wafer fabrication, where US sanctions have seriously constrained China’s advance, “back-end” assembly, packaging and test (APT) is an area where China has a large market presence and sophisticated technology, making it relatively immune to US technology blocks.
Taiwan’s TSMC, by far the world’s largest and most technologically advanced IC foundry, is rapidly expanding its Chip-on-Wafer-on-Substrate (CoWoS) packaging capacity. This will eliminate a bottleneck that has limited the supply of the latest AI processors from Nvidia, AMD and Intel fabricated at process nodes below 5 nanometers.